Jupiter HW Board is suitable for building a LTE Macro 3 sector cell  eNB.  The HW is also capable of realizing a LTE L3 relay application with capability run both UE and eNB application simultaneously. There are two FMC connectors on the board with ultrascale FPGA enables integration of multiple FMC based radio modules. The HW board has capability to support 8 TX and 8 RX Antenna Port for 5G NR spec.
JupiterV2BrdLR
Platform Overview
The Jupiter HW uses TCI6638K2K System on Chip(SoC) from Texas Instrument. The SoC brings in enormous computing power to develop PHY and Higher Layer Software. There are 8 C66X DSP cores and 4 ARM cores along with several HW accelerator blocks for functions like FFT, FEC (Viterbi and Turbo) , Packet Processing and Security Acceleration.

Jupiter board has 2 industry standard FMC connectors for interfacing various radio transceiver cards. FMC connectors are glued to the SoC using a high end Xilinx Ultra Scale FPGA. The FPGA adds enormous computation power for taking care of additional HW accelerations that may be required by the application running on the SoC.

Development Environment
LTEeNBHardware
The platform is demonstrated with LTE eNB and LTE UE application developed inhouse. LTE application can be licensed independently along with platform.

 

  • The DSPs on the SoC is programmed using the Code Composer Studio, IDE from Texas Instrument.
  • The ARM Cortex A15 cores are programmed with the help of GCC compilers.
  • FPGA code is developed using Vivado Tools from Xilinx