eNodeB PHY Stack (Layer 1)

The PHY stack is available for licensing in two flavors. First as a platform independent C code which implements complete PHY stack as a standalone stack portable to any DSP or FPGA based SoC. A platform optimized PHY stack is also available which has optimized code and embedded framework to utilize various accelerations on Texas Instrument’s Keystone II DSP SoC architecture. The PHY stack developed is ideal for developing a small cell or a macro cell product. The PHY stack can be deployed on any Keystone II platform to achieve various modes like multi sector mode or 2 carrier mode of operation. The PHY stack on Keystone II can co-exist with UE on a same DSP SoC to implement relay mode of operation.

Some of the key specifications are as below

eNodeB PHY Stack (Layer 1)
Parameter Specification
Duplexing Modes TDD & FDD
Bandwidth Support 1.4, 3, 5, 10 and 20 MHz
Modulation Scheme DL – Up to QAM64 UL- Up to QAM16
MIMO Modes 2×2, 4×2, 4×4
L1L2 Interface FAPI version 9.0
PAPR Reduction Crest Factor Reduction
Transmit Mode TM1 to TM7